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Computer Technologies








 Europe Acts for 432 Core RISC-V Processor


Researchers at the European Space Agency, the University of Bologna, and ETH Zurich want to perform high-performance computations in artificial intelligence applications by developing a chiplet-designed RISC-V processor.


The project group has developed an open-source RISC-V silicon artificial intelligence chip called Occamy, which aims to increase efficiency by reducing the time required to perform calculations. Occamy is a chipset designed processor developed as an open-source RISC-V silicon artificial intelligence chip. The chip, which has about 1 billion transistors, is placed in an area of 72mm^2, like the Sandy Bridge quad-core chip. Occamy's design is part of the EuPilot program developed to reduce the need to buy chips from ARM and x86 chip manufacturers. New and old technologies are used in the design of Occamy. The memory portion of the Occamy chip is built using dual 16GB HBM2E DRAM and 2.5D integration technology designed by Micron. In addition, a 32-bit RISC-V control chip performs data mapping and information routing, accelerating the computations of the AI cores in the Occamy chip. The RISC-V processor is built on the 12nm GlobalFoundry "GF12LPP" process and then placed on a 65nm passive interposer. This processor provides a total of 432 cores using up to 216 32-bit cores and delivers 0.768, 1,536, 3,072, and 6,144 TFLOPs of performance at FP64, FP32, FP16, and FP8 sensitivities, respectively. More information will be announced in the future.

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